Examples of using Memory controller in English and their translations into Spanish
{-}
-
Colloquial
-
Official
Offers an integrated HD Graphics 4600 GPU and a dual channel DDR3 memory controller.
Ofrece Offers an integrated HD Graphics 4600 GPU and a dual-channel DDR3 memory controller.
Ofrece upgraded to the 6120, with the 6102 memory controller built-in.
en su interior integraba The principal improvements are support for simultaneous multithreading(SMT) and an on-die memory controller.
Los cambios principales son el soporte para Simultaneous multithreading(SMT)(multihilo simultáneo) y un controlador de memoria en la pastilla.In order to extend the memory's useable life, the SSD's memory controller employs various algorithms that spread the storage of data across all memory cells.
Para prolongar la vida útil Data access time, from the moment that the memory controller(located in the CPU
El tiempo including the Graphics& Memory Controller Hub(GMCH), I/O Controller Hub(ICH),
incluyendo el Graphics& Memory Controller Hub(GMCH), I/O during initialization, the memory controller must use its knowledge of the clock frequency to translate that limit into cycles.
durante la inicialización, el controlador de memoria debe utilizar su conocimiento The memory controller must simply issue a sufficient number of auto refresh commands(one per row,
El controlador de memoria, simplemente debe enviar un número suficiente It can be done if the DQM signal is used to suppress output from the SDRAM so that the memory controller may drive data over the DQ lines to the SDRAM in time for the write operation.
Se puede hacer, si la señal DQM se utiliza para suprimir la producción It is the duty of the memory controller to ensure that the SDRAM is not driving read data on to the DQ lines at the same time that it needs to drive write data on to those lines.
Es el deber del controlador de memoria para garantizar que la SDRAM no es leer los datos will be forwarded to the memory controller using a scheme which is specific to every chipset.
se remitirá al controlador de memoria usando un esquema que es específico which integrate the CPU, memory controller, graphics and I/O devices into one package.
que integra la CPU, controlador de memoria, gráficos y dispositivos it allows the memory controller to be disabled entirely,
permite que el controlador de memoria para ser desactivado por completo,through a process called"Rank Multiplication," transform a Quad Rank LRDIMM into a Dual Rank memory module for the memory controller.
mediante un proceso llamado"Multiplicación A memory controller is needed to manage the memory subsystem and different population rules governing the memory controller will affect the frequency/speed and latency at which
Es necesario un controlador de memoria para gestionar el subsistema In order to extend the memory's useable life, the SSD's memory controller employs various algorithms that spread the storage of data across all memory cells.
A efectos For"×8" registered DIMMs, each side is 72 bits wide, so the memory controller only addresses one side at a time the two-sided module is dual-ranked.
Para los«DIMM x8», cada lado es A memory controller is needed to manage the memory subsystem and different population rules governing the memory controller will affect the frequency/speed
multiplier greatly exceeds two, the bandwidth and latency of specific memory ICs(or the bus or memory controller) typically become a limiting factor.
la latencia 
